Staff / Sr. Staff Digital Design Engineer, Interface IP Job at Synopsys, Inc., Sunnyvale, CA

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  • Synopsys, Inc.
  • Sunnyvale, CA

Job Description

Staff / SR. Staff Digital Design Engineer, Interface IP Description & Requirements We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An enthusiastic and detail-oriented ASIC Digital Design Engineer with a passion for cutting-edge technology and a penchant for solving complex problems. You thrive in a collaborative environment and are adept at translating high-level requirements into robust and efficient designs. Your expertise, coupled with your strong understanding of digital design and verification methodologies, makes you an invaluable asset to any project. You are proactive, with excellent communication skills that enable you to work effectively with cross-functional teams. Your ability to adapt quickly to new challenges and technologies ensures that you remain at the forefront of industry advancements. What You’ll Be Doing: Designing and verifying digital IP for ASICs, focusing on interface IPs. Performing RTL coding and simulation to optimize design performance and efficiency. Collaborating with cross-functional teams to ensure thorough testing and validation of designs. Conducting design and verification reviews and providing constructive feedback to improve overall quality and functionality. Debugging and resolving complex design and verification issues. Documenting design specifications, test plans, and verification reports. The Impact You Will Have: Contributing to the successful delivery of high-performance IPs. Enhancing the reliability and performance of Synopsys products through rigorous design and verification. Driving innovation by developing cutting-edge solutions for interface IP. Strengthening Synopsys’ reputation as a leader in the semiconductor industry. Improving the efficiency and effectiveness of the design and verification process. Supporting the continuous improvement of design methodologies and best practices. What You’ll Need: Proficiency in digital design and verification methodologies. Experience with RTL coding using Verilog or SystemVerilog. Strong understanding of digital design principles, including timing analysis and optimization. Expertise in using advanced verification techniques, including UVM. Familiarity with scripting languages such as Python or Perl for automation. Who You Are: An analytical thinker with a keen eye for detail. A proactive problem-solver who can navigate complex challenges. An excellent communicator who can articulate technical concepts to diverse audiences. A collaborative team player who thrives in a dynamic environment. A continuous learner who stays updated with industry trends and advancements. A results-driven professional committed to delivering high-quality work. The Team You’ll Be A Part Of: You will join a dedicated team of engineers focused on the design and verification of high-performance digital IPs. Our team is committed to innovation, quality, and excellence, working collaboratively to push the boundaries of technology. We value continuous learning and professional growth, providing ample opportunities for development and advancement. #J-18808-Ljbffr Synopsys, Inc.

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